Senior Engineer (Level 2)

Position: Senior Engineer (Level 2) Job Description: Design RF and high-frequency analog circuits for high-speed SerDes PHY SoCs including LNAs, mixers, VCOs, PLL building blocks, and high-speed I/O drivers operating at multi-GHz frequencies - Develop impedance-matched RF front-ends for high-speed SerDes transmitters and receivers, minimizing signal reflections, return loss, and insertion loss across the target frequency range - Design on-chip passive structures transmission lines, baluns, tran…