ASIC RTL

Role: ASIC RTL Design Engineer Mandatory Skill : (RTL Design, RTL Coding & Integration, IP Design, targeted for SOC, Micro architecture, Static checks, ARM Cortex-M7 (CM7), Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI) Experience : 4 Years 22 Years Notice : Immediate 60 days Work Location : Bangalore / Hyderabad Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem /Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, …