Analog Design Engineer (ASIC) (CE810SI RM 4592)

Position: Analog Design Engineer (ASIC) (CE810SI RM 4592) Functional Area: Analog Mixed signal Design Work Mode : Work from Office Experience Level : 8-10 Relevant Experience required : 8 – 10 Education Required: BTech (MTech will be additional and good) Must Have Skills Demonstrated proficiency in PLL/FLL and frequency synthesis architecture and circuit design. This includes digital and analog approaches, DCO/VCO design both RO and LC, Fractional-N, SSC, Spur and Jitter cancellation techniques…